SystemC

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SystemC is often thought of as a hardware description language like VHDL and Verilog, but is more aptly described as a system description language, since it exhibits its real power during Electronic system level Design (ESL), transaction-level modeling , behavioral modeling, and High Level Synthesis. SystemC is a set of library routines and macros implemented in C++, which makes it possible to simulate concurrent processes, each described by ordinary C++ syntax. Instantiated in the SystemC framework, the objects described in this manner may communicate in a simulated real-time environment, using signals of all the datatypes offered by C++, some additional ones offered by the SystemC library, as well as user defined.

The behaviors (processes) defined may be instantiated any number of times, and provisions are made for processes defined by hierarchies of other processes, as one would expect.

The language thus offered has semantical similarities to VHDL and Verilog, but may be said to have a syntactical overhead compared to these. On the other hand, greater freedom of expressiveness is offered in return, like object oriented design partitioning and template classes. Which is more: SystemC is both a description language and a simulation kernel. The code written will compile together with the library's simulation kernel to give an executable that behaves like the described model when it is run. The performance of this simulation kernel is not to be compared with that of commercial VHDL/Verilog simulators designed to simulate RTL level designs at the present.

Contents

[edit] History

  • 1999-09-27 Open SystemC Initiative announced
  • 2000-03-01 SystemC V0.91 released
  • 2000-03-28 SystemC V1.0 released
  • 2001-02-01 SystemC V2.0 specification and V1.2 Beta source code released
  • 2003-06-03 SystemC 2.0.1 LRM (language reference manual) released
  • 2005-06-06 SystemC 2.1 LRM and TLM 1.0 transaction-level modeling standard released
  • 2005-12-12 IEEE approves the IEEE 1666–2005 standard for SystemC
  • 2007-04-13 SystemC v2.2 released
  • 2008-06-09 TLM 2.0 released

ARM Ltd., CoWare, Synopsys and CynApps teamed up to develop SystemC (CynApps later became Forte Design Systems) to launch it first draft version in 1999[1][2]. The chief competitor at the time was SpecC another C++ based open source package developed by UC Irvine personnel and some Japanese companies.

In June 2000, a standards group known as the Open SystemC Initiative was formed to provide an industry neutral organization to host SystemC activities and to allow Synopsys' largest competitors, Cadence and Mentor Graphics, democratic representation in SystemC development.

In July 2004, Synopsys withdraw from its engagement in SystemC.

[edit] Language Features

[edit] Modules

Modules are the basic building blocks of a SystemC design hierarchy. A SystemC model usually consists of several modules which communicate via ports. The Modules Can be Thought of a building block of systemC.

[edit] Ports

Ports allow communication from inside a module to the outside (usually to other modules).

[edit] Processes

Processes are the main computation elements. They are concurrent.

[edit] Channels

Channels are the communication elements of SystemC. They can be either simple wires or complex communication mechanisms like fifos or bus channels.

Elementary channels:

  • signal
  • buffer
  • fifo
  • mutex
  • semaphore

[edit] Interfaces

Ports use interfaces to communicate with channels.

[edit] Events

Allow synchronization between processes.

[edit] Data types

SystemC introduces several data types which support the modeling of hardware.

Extended standard types:

  • sc_int<> 64-bit signed integer
  • sc_uint<> 64-bit unsigned integer
  • sc_bigint<> arbitrary precision signed integer
  • sc_biguint<> arbitrary precision unsigned integer

Logic types:

  • sc_bit 2-valued single bit
  • sc_logic 4-valued single bit
  • sc_bv<> vector of sc_bit
  • sc_lv<> vector of sc_logic

Fixed point types:

  • sc_fixed<> templated signed fixed point
  • sc_ufixed<> templated unsigned fixed point
  • sc_fix untemplated signed fixed point
  • sc_ufix untemplated unsigned fixed point

[edit] Example

Example code of an adder:

#include "systemc.h"
 
SC_MODULE(adder)          // module (class) declaration
{
  sc_in<int> a, b;        // ports
  sc_out<int> sum;
 
  void do_add()           // process
  {
    sum = a + b;
  }
 
  SC_CTOR(adder)          // constructor
  {
    SC_METHOD(do_add);    // register do_add to kernel
    sensitive << a << b;  // sensitivity list of do_add
  }
};

[edit] Vendors supporting SystemC

[edit] References

  1. ^ Synopsys and Co-Ware Inc., which did much of the work behind the SystemC -- http://www.electronicsweekly.com/Articles/1999/12/07/13906/stm-synopsys-in-3-year-rampd-deal.htm
  2. ^ "ARM is pleased that Synopsys, CoWare and other companies have come together on SystemC, because if it is taken up by the industry, it simplifies our world," said Tudor Brown, chief technology officer of ARM Ltd" in Babel of languages competing for role in SoC - http://www.eetimes.com/ip99/ip99story1.html
  1. SystemC.org SystemC World/News Room
  2. T. Grötker, S. Liao, G. Martin, S. Swan, System Design with SystemC. Springer, 2002. ISBN 1402070721
  3. A SystemC based Linux Live CD with C++/SystemC tutorial
  4. J. Bhasker, A SystemC Primer, Second Edition, Star Galaxy Publishing, 2004. ISBN 0965039129
  5. D. C. Black, J. Donovan, SystemC: From the Ground Up, Springer 2005. ISBN 0387292403
  6. Frank Ghenassia (Editor), Transaction-Level Modeling with Systemc: Tlm Concepts and Applications for Embedded Systems, Springer 2006. ISBN 0387262326

[edit] External links

Retrieved from "http://en.wikipedia.org/wiki/SystemC"
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