Opteron

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Opteron

Opteron logo
Produced From April 2003 to present
Common manufacturer(s) AMD
Max. CPU clock 1.4 GHz to 3.2 GHz
FSB speeds 800 MHz to 1000 MHz
Min. feature size 0.13µm to 45nm
Instruction set x86, x86-64
Cores 1, 2, or 4

The Opteron is AMD's x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). It was released on April 22, 2003 with the SledgeHammer core (K8) and was intended to compete in the server market, particularly in the same segment as the Intel Xeon processor. Processors based on the AMD K10 microarchitecture (codenamed Barcelona) were announced on September 10, 2007 featuring a new quad-core configuration.

Contents

[edit] Technical description

AMD Opteron.

[edit] Two key capabilities

Opteron combines two important capabilities in a single processor:

  1. native execution of legacy x86 32-bit applications without speed penalties
  2. native execution of x86-64 64-bit applications

The first capability is notable because at the time of Opteron's introduction, the only other 64-bit processor architecture marketed with 32-bit x86 compatibility (Intel's Itanium) ran x86 legacy-applications only with significant speed degradation. The second capability, by itself, is less noteworthy, as all major RISC makers (Sun SPARC, DEC Alpha, HP PA-RISC, IBM POWER, SGI MIPS, etc.) have had 64-bit implementations for many years. In combining these two capabilities, however, the Opteron earned recognition for its ability to run the vast installed base of x86 applications economically, while simultaneously offering an upgrade-path to 64-bit computing.

The Opteron processor possesses an integrated DDR SDRAM / DDR2 SDRAM (Socket AM2/F) memory controller. This both reduces the latency penalty for accessing the main RAM and eliminates the need for a separate northbridge chip.

[edit] Multi-processor features

In multi-processor systems (more than one Opteron on a single motherboard), the CPUs communicate using the Direct Connect Architecture over high-speed HyperTransport links. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing; instead of having one bank of memory for all CPUs, each CPU has its own memory. Thus the Opteron is a Non-Uniform Memory Access (NUMA) architecture. The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional (and expensive) routing chips to support more than 8 CPUs (cores, ie 2x quad) per box.

In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon[1]. This is primarily because adding an additional Opteron processor increases bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric, rather than a shared bus. In particular, the Opteron's integrated memory controller allows the CPU to access local RAM very quickly. In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a typical Xeon system, contention for the shared bus causes computing efficiency to drop. Intel is migrating to a memory architecture similar to the Opteron's for the Intel Core i7 family of processors.

[edit] Multi-core Opterons

Quad-Core Opteron processor.

In May 2005, AMD introduced its first "Multi-Core" Opteron CPUs. At the time, AMD's use of the term "Multi-Core" in practice meant "dual-core"; each physical Opteron chip contained two separate processor cores. This effectively doubled the computing-power available to each motherboard processor socket. One socket can now deliver the performance of two processors, two sockets can deliver the performance of four processors, and so on. Because motherboard costs increase dramatically as the number of CPU sockets increase, multicore CPUs enable a system of higher performance to be built at lower cost.

AMD's model number scheme has changed somewhat in light of its new multicore lineup. At the time of its introduction, AMD's fastest multicore Opteron was the model 875, with two cores running at 2.2 GHz each. AMD's fastest single-core Opteron at this time was the model 252, with one core running at 2.6 GHz. For multithreaded applications, or many single threaded applications, the model 875 would be much faster than the model 252.

Second-Generation AMD Opteron processors are offered in three series: the 1000 Series (up to 1P/2-core), the 2000 Series (up to 2P/4-core), and the 8000 Series (4P/8-core to 8P/16-core). The 1000 Series is built on AMD's new Socket AM2. The 2000 Series and 8000 Series are built on AMD's new Socket F.

AMD launched its Third-Generation Quad-core[2] Opteron chips on September 10th, 2007 [3] with hardware vendors to follow suit with servers in the following month. Based on a core design codenamed Barcelona, new power and thermal management techniques are planned for the chips. Existing dual core DDR2 based platforms will be upgradeable to quad core chips[4].

[edit] Socket 939

AMD has also released Socket 939 Opterons, reducing the cost of motherboards for low-end servers and workstations. Except for the fact they have 1 MB L2 Cache (versus 512 KB for the Athlon64) the Socket 939 Opterons are identical to the San Diego and Toledo core Athlon 64s, but are run at lower clockspeeds than the cores are capable of, making them more stable. They are also the only dual core Socket 939 processors still easily available now that the Athlon 64 X2s for that platform have been discontinued, though even these processors are becoming more and more difficult to find. [1]

[edit] Socket AM2

Socket AM2 Opterons are available for servers that only have a single-chip setup. These chips may prove to be as successful as the previous generation socket 939 Opterons due to the Opteron's overclockability. Codenamed Santa Ana, rev. F dual core AM2 Opterons feature 2×1 MB L2 cache, unlike the majority of their Athlon 64 X2 cousins which feature 2x512 KB L2 cache.

[edit] Socket F

Socket F (LGA 1207 contacts) is AMD’s second generation of Opteron socket. This socket supports processors such as the Santa Rosa, Barcelona and Shanghai codenamed processors. The “Lidded Land Grid Array” socket adds support for DDR2 SDRAM and improved HyperTransport version 3 connectivity. Physically the socket and processor package are nearly identical, although not generally compatible with socket 1207 FX

[edit] Micro-architecture update

The Opteron line saw an update with the implementation of the AMD K10 microarchitecture. New processors, launched in the third quarter of 2007 (codename Barcelona), incorporate a variety of improvements, particularly in memory prefetching, speculative loads, SIMD execution and branch prediction, yielding an appreciable performance improvement over K8-based Opterons, within the same power envelope.[5]

In the meantime, AMD has also utilized a new scheme to characterize the power consumption of new processors under "average" daily usage, named Average CPU Power (ACP).

[edit] Models

For Socket 940 and Socket 939 Opterons, each chip has a three-digit model number, in the form Opteron XYY. For Socket F and Socket AM2 Opterons, each chip has a four-digit model number, in the form Opteron XZYY. For all Opterons, the first digit (the X) specifies the number of CPUs on the target machine:

For Socket F and Socket AM2 Opterons, the second digit (the Z) represents the processor generation. Presently, only 2 (dual-core, DDR2) and 3 (quad-core, DDR2) are used.

For all Opterons, the last two digits in the model number (the YY) indicate the clock frequency of a CPU, a higher number indicating a higher clock frequency. This speed indication is comparable to processors of the same generation if they have the same amount of cores, single-cores and dual-cores have different indications despite sometimes having the same clock frequency.

The suffix HE or EE indicates a high-efficiency/energy-efficiency model having a lower TDP than a standard Opteron. The suffix SE indicates a top-of-the-line model having a higher TDP than a standard Opteron.

A detailed list of Opteron microprocessors is here. The broad model families are:

[edit] Opteron (130 nm SOI)

Single-core — SledgeHammer (1yy, 2yy, 8yy)

[edit] Opteron (90 nm SOI, DDR)

Single-core — Venus (1yy), Troy (2yy), Athens (8yy)
Dual-core — Denmark (1yy), Italy (2yy), Egypt (8yy)

[edit] Opteron (90 nm SOI, DDR2)

Dual-core — Santa Ana (12yy), Santa Rosa (22yy, 82yy)

[edit] Opteron (65 nm SOI)

Quad-core — Barcelona (23yy, 83yy), Budapest (13yy)

[edit] Opteron (45 nm SOI)

Quad-core — Shanghai

This is AMD's recently-announced 45 nm Opteron processor. Advantages over current Opteron processors include:

  • CPU-Steppings: C2
  • L3-Cache: 6 MB, shared
  • Clockrate: up to 2900 MHz
  • HyperTransport 3.0
  • 20% reduction in idle power consumption[3]
  • support for DDR2 800MHz memory [4]

[edit] Supercomputers

On the November 2007 TOP500 list, 15.8% of the world's 500 fastest known supercomputer installations were AMD64 Opteron-based systems (down from 22.6% on 11/06), while 64.4% were Intel ia32e/EM64T/Intel 64 Xeon-based.

Supercomputers based on Opteron mentioned in the top 10 fastest supercomputers in the world:

  • #2: Oak Ridge National Laboratory, USA. Jaguar - Cray XT5. AMD64 Opteron Quad Core 2300 MHz (9.2 GFlops/unit). Cray Inc. 150,152 total cores. Rpeak: 1381.400 TFlop.
  • #6: Sandia National Laboratories, USA. Red Storm - Sandia/ Cray Red Storm, AMD64 Opteron Dual Core 2400 MHz. Cray Inc. 26,569 total cores. Rpeak: 127.531 TeraFlops.
  • #9: NERSC/LBNL, USA. Franklin - Cray XT4. AMD64 Opteron Dual Core 2600 MHz. Cray Inc. 19,320 total cores. Rpeak: 100.464 TFlop.

[edit] Issues

[edit] Opteron without Optimized Power Management

AMD has released some Opteron processors without Optimized Power Management (OPM) support, which use DDR memory. The following table describes those processors lacking OPM.

Max P-State
Frequency
Min P-State
Frequency
Model Package-Socket Core # Manufacturing
Process
Part Number(OPN)
1400 MHz N/A 140 Socket 940 1 130 nm OSA140CEP5AT
1400 MHz N/A 240 Socket 940 1 130 nm OSA240CEP5AU
1400 MHz N/A 840 Socket 940 1 130 nm OSA840CEP5AV
1600 MHz N/A 142 Socket 940 1 130 nm OSA142CEP5AT
1600 MHz N/A 242 Socket 940 1 130 nm OSA242CEP5AU
1600 MHz N/A 842 Socket 940 1 130 nm OSA842CEP5AV
1600 MHz N/A 242 Socket 940 1 90 nm OSA242FAA5BL
1600 MHz N/A 842 Socket 940 1 90 nm OSA842FAA5BM
1600 MHz N/A 260 Socket 940 2 90 nm OSK260FAA6CB
1600 MHz N/A 860 Socket 940 2 90 nm OSK860FAA6CC

[edit] Opteron recall

AMD has recalled some E4 stepping-revision single-core Opteron processors, including x52 (2.6 GHz) and x54 (2.8 GHz) models which use DDR memory. The following table describes affected processors, as they are listed in AMD Opteron x52 and x54 Production Notice.[6]

Max P-State
Frequency
Uni-Processor Dual Processor Multi-Processor Package-Socket
2600 MHz 152 252 852 Socket 940
2800 MHz N/A 254 854 Socket 940
2600 MHz 152 N/A N/A Socket 939
2800 MHz 154 N/A N/A Socket 939

The affected processors may produce inconsistent results in the presence of three specific conditions occurring simultaneously:

  • The execution of floating point-intensive code sequences
  • Elevated processor temperatures
  • Elevated ambient temperatures

A software verification tool for identifying the AMD Opteron processors listed in the above table that may be affected under these specific conditions is available only to AMD OEM partners.[citation needed] AMD will replace those processors at no charge.[citation needed]

[edit] Future

Future Opteron processors will include codenamed Istanbul products in early 2009, later in 1H 2009- 2H 2010 the lineup will be replaced with codenamed six-core Sao Paolo and twelve-core Magny-Cours products manufactured using the MCM technique, utilizing Socket G34. Further, the server line of processors will incorporate the newly announced Bulldozer core with native 4 cores or more configurations on 32 nm process, each supporting SSE5 aimed at better HPC and cryptographic computations. Bulldozer-based products are expected to be released in 2011.

[edit] See also

[edit] References

[edit] External links

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