Zilog Z80

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One of the first Z80 microprocessors manufactured; the date stamp is from June 1976.
A CMOS Z80 in a QFP package.

The Zilog Z80 is an 8-bit microprocessor designed and sold by Zilog from July 1976 onwards. It was widely used both in desktop and embedded computer designs as well as for military purposes. The Z80 and its derivatives and clones make up one of the most commonly used CPU families of all time, and, along with the MOS Technology 6502 family, dominated the 8-bit microcomputer market from the late 1970s to the mid-1980s.

Although Zilog made early attempts with advanced mini-computer like versions of the Z80-architecture (Z800 and Z280), these chips never caught on. The company was also trying hard in the workstation market with its Z8000 and 32-bit Z80000 (both unrelated to Z80). In recent decades Zilog has refocused on the ever-growing market for embedded systems (for which the original Z80 and the Z180 were designed) and the most recent Z80-compatible microcontroller family, the fully pipelined 24-bit eZ80 with a linear 16 MB address range, has been successfully introduced alongside the simpler Z180 and Z80 products.

Zilog licensed the Z80 core to any company wishing to make the device royalty free, though many East European and Russian manufacturers made unlicensed copies. This enabled a small company's product to gain acceptance in the world market since second sources from far larger companies such as Toshiba started to manufacture the device. Consequently Zilog has made less than 50% of the Z80s since its conception.

Contents

[edit] Brief history and overview

The Z80 came about when Federico Faggin, after working on the 8080, left Intel at the end of 1974 to found Zilog with Ralph Ungermann, and by July 1976 they had the Z80 on the market. It was designed to be binary compatible with the Intel 8080 so that most 8080 code, notably the CP/M operating system, would run unmodified on it.

The Z80's original DIL40 chip package pinout.

The Z80 offered many real improvements over the 8080:

  • An enhanced instruction set including bit manipulation, block move, block I/O, and byte search instructions
  • New IX and IY index registers and instructions for them
  • A vectorized interrupt mode (mode 2), as well as a useful "no hardware"-mode (mode 1)
  • Two separate register files, which could be quickly switched, to speed up response to interrupts
  • Less hardware required for power supply, clock generation and interface to memory and I/O
    • Single 5 Volt power supply (the 8080 needed -5V/+5V/+12V)
    • Single-phase 5V clock (the 8080 needed a two-phase high-amplitude clock generator)
    • A built-in DRAM refresh mechanism that would otherwise have to be provided by external circuitry
    • Non-multiplexed buses (the 8080 had state-signals multiplexed onto the data bus)
  • A much lower price

The Z80 quickly took over from the 8080 in the market, and became one of the most popular 8-bit CPUs. Perhaps a key to the success of the Z80 was the built-in DRAM refresh, and other features which allowed systems to be built with fewer support chips.

For the original NMOS design, the specified upper clock frequency limit increased successively from the introductory 2.5 MHz, via the well known 4 MHz (Z80a), up to 6 (Z80b) and 8 MHz (Z80h). A CMOS version was also developed with specified frequency limits[1] ranging from 4 MHz up to 20 MHz for the version sold today. The CMOS version also allowed a low-power sleep with internal state retained (having no lower frequency limit).[2] The fully compatible derivatives Z180 and eZ80 are currently specified for up to 33 and 50 MHz respectively.

[edit] Technical description

[edit] Programming model and register set

The programming model and register set are conventional and similar to many other processors, such as the related x86 family. The 8080 compatible registers AF, BC, DE, HL are duplicated as two separate banks in the Z80, where the processor can quickly switch from one bank to the other; a feature useful for speeding up responses to single level, high priority interrupts. This feature was present in the Datapoint 2200 but was not implemented by Intel in the 8008. The dual-register set makes sense as the Z80 (like most microprocessors at the time) was really intended for embedded use, not for personal computers, or the yet-to-be invented home computers.[3] It also turned out to be quite useful for hard-optimized manual assembly coding. Some software, especially games for the MSX, Sinclair ZX Spectrum and other Z80 based computers took Z80 assembly optimization to rather extreme levels, employing the duplicated registers among other things.

The Z80 architecture.

The 8080 compatible registers:

  • AF - 8-bit accumulator (A) and flag bits (F) carry, zero, minus, parity/overflow, half-carry (used for BCD), and an Add/Subtract flag (usually called N) also for BCD
  • BC - 16-bit data/address register or two 8-bit registers
  • DE - 16-bit data/address register or two 8-bit registers
  • HL - 16-bit accumulator/address register or two 8-bit registers
  • SP - stack pointer, 16 bits
  • PC - program counter, 16 bits

Registers introduced with the Z80:

  • IX - 16-bit index or base register for 8-bit immediate offsets
  • IY - 16-bit index or base register for 8-bit immediate offsets
  • I - interrupt vector base register, 8 bits
  • R - DRAM refresh counter, 8 bits (msb does not count)
  • AF' - alternate (or shadow) accumulator and flags (toggled in and out with EX AF,AF' )
  • BC', DE', and HL' - alternate (or shadow) registers (toggled in and out with EXX)
  • Four bits of interrupt status and interrupt mode status

There is no direct access to the alternate registers; instead, two special instructions, EX AF,AF' and EXX, each toggles one of two multiplexer flipflops; this enables fast context switches for interrupt service routines: EX AF, AF' may be used alone (for really simple and fast interrupt routines) or together with EXX to swap the whole AF, BC, DE, HL set; still much faster than pushing the same registers on the stack (slower, lower priority, or multi level interrupts normally use the stack to store registers).

The refresh register, R, increments[4] each time the CPU fetches an opcode (or opcode prefix) and has therefore no simple relationship with program execution. This has sometimes been used to generate pseudorandom numbers in games, and also in software protection schemes. It has also been employed as a "hardware" counter in some designs; a famous example of this is the ZX81, which lets it keep track of character positions on the TV screen by triggering an interrupt at wrap around (by connecting INT to A6).

The interrupt vector register, I, is used for the Z80 specific mode 2 interrupts (selected by the im 2 instruction). It supplies the base address for a 128-entry table of service routine addresses which are selected via a pointer sent to the CPU during an interrupt acknowledge cycle. The pointer identifies a particular peripheral chip and/or peripheral function or event, where the chips are normally connected in a so called daisy-chain for priority resolution. Like the refresh register, this register has also sometimes been used creatively.

[edit] The Z80 assembly language

[edit] Background - the Datapoint 2200 and Intel 8008

The first Intel 8008 assembly language was based on a very simple (but systematic) syntax inherited from the Datapoint 2200 design. This original syntax was later transformed into a new, somewhat more traditional, assembly language form for this same original 8008 chip. At about the same time, the new assembly language was also extended to accommodate the added addressing possibilities in the more advanced Intel 8080 chip (the 8008 and 8080 shared a language subset without being binary compatible; the 8008 actually was binary compatible with the Datapoint 2200 however).

In this process, the mnemonic L, for LOAD, was replaced by various abbreviations of the words LOAD, STORE and MOVE, intermixed with other symbolic letters. The mnemonic letter M, for memory (referenced by HL), was lifted out from within the instruction mnemonic to become a syntactically freestanding operand, while registers and combinations of registers became very inconsistently denoted; either by abbreviated operands (MVI D, LXI H etc), within the instruction mnemonic itself (LDA, LHLD etc), or both at the same time (LDAX B, STAX D etc).

Datapoint 2200
& i8008       i8080        Z80          i8086/i8088
(ca -1973)  (ca 1974)     (1976)          (1978)

LBC        MOV B,C      LD B,C           MOV BL,CL

--         LDAX B       LD A,(BC)        MOV AL,[BX]
LAM        MOV A,M      LD A,(HL)        MOV AL,[BP]
LBM        MOV B,M      LD B,(HL)        MOV BL,[BP]

--         STAX D       LD (DE),A        MOV [DX],AL
LMA        MOV M,A      LD (HL),A        MOV [BP],AL
LMC        MOV M,C      LD (HL),C        MOV [BP],CL

LDI 56     MVI D,56     LD D,56          MOV DL,56
LMI 56     MVI M,56     LD (HL),56       MOV byte ptr [BP],56

--         LDA 1234     LD A,(1234)      MOV AL,[1234]
--         STA 1234     LD (1234),A      MOV [1234],AL

--         --           LD B,(IX+56)     MOV BL,[SI+56]
--         --           LD (IX+56),C     MOV [SI+56],CL
--         --           LD (IY+56),78    MOV byte ptr [DI+56],78

--         LXI B,1234   LD BC,1234       MOV BX,1234
--         LXI H,1234   LD HL,1234       MOV BP,1234

--         SHLD 1234    LD (1234),HL     MOV [1234],BP
--         LHLD 1234    LD HL,(1234)     MOV BP,[1234]
--         --           LD BC,(1234)     MOV BX,[1234]
--         --           LD IX,(1234)     MOV SI,[1234]

Illustration of four syntaxes, using samples of equivalent, or (for 8086) very similar, load and store instructions.

[edit] The new syntax

According to Masatoshi Shima, certain people within Zilog wanted a "computer oriented" image for the company, and also felt they needed to "differentiate" their first product from the 8080. Intel had also claimed copyright on their assembly mnemonics. Yet another assembly syntax was therefore developed, but this time with a more systematic approach:

  • All registers and register pairs are explicitly denoted by their full names
  • Round brackets are consistently used to state "contents of" (or indirection, or pointer dereferencing) (except for the mnemonic “jp (hl)”, which is inconsistent).
  • All load and store instructions use the same mnemonic name, LD, for LOAD (a return to the simplistic Datapoint 2200 vocabulary); other common instructions, such as ADD, INC etc, use the same mnemonic regardless of addressing mode or operand size. This is possible because the operands themselves carry enough information.

These principles made it straightforward to find names and forms for all new Z80 instructions, as well as orthogonalizations of old ones, such as LD BC,(1234) above.

It is interesting to see the resemblance between Z80 and 8086 syntax, as illustrated by the table. Apart from naming differences, and despite a certain discrepancy in basic register structure, the two are virtually isomorphous for a large portion of instructions. Whether this is due to some common influence on both design teams (above 8080, such as PDP-11), the competitive nature of the relation between the two designs, or maybe just a matter of taste, is, so far, uncertain.[5]

[edit] Instruction set and encoding

The Z80 uses 252 out of the available 256 codes as single byte opcodes; the four remaining codes are used extensively as opcode prefixes: CB and ED enable extra instructions and DD or FD selects IX+d or IY+d respectively (in some cases without displacement d) in place of HL. This scheme gives the Z80 a large number of permutations of instructions and registers; ZiLOG categorizes these into 158 different "instruction types", 78 of which are the same as those of the Intel 8080 (allowing operation of 8080 programs on a Z80). The ZiLOG documentation further groups instructions into the following categories:

  • 8-bit arithmetic and logic operations
  • 16-bit arithmetic
  • 8-bit load
  • 16-bit load
  • Bit set, reset, and test
  • Call, return, and restart
  • Exchange, block transfer, and search
  • General purpose arithmetic and CPU control
  • Input and output
  • Jump
  • Rotate and shift

The bit set, reset, and test instructions are well adapted to I/O control. No multiply instruction is available in the original Z80. Different sizes and variants of additions, shifts, and rotates have somewhat differing effects on flags because the flag-influencing properties of the 8080 had to be copied for compatibility. Load instructions do not affect the flags (except for the special purpose I and R register loads). The index register instructions are useful for reducing code size, and, while some of them are not much faster than "equivalent" sequences of simpler operations, they also save execution time indirectly by reducing the need to save and restore registers.[6] Similarly, instructions for 16-bit additions are not particularly fast (11 clocks) in the original Z80; nonetheless, they are about twice as fast as performing the same calculations using 8-bit operations, and equally important, they reduce register usage.[7]

[edit] Undocumented instructions

The index registers, IX and IY, were intended as flexible 16 bit pointers, enhancing the ability to manipulate memory, stack frames and data structures. Officially, they were treated as 16 bit only. In reality, they were implemented as a sort of copy of the HL register which is accessible as 16 bits or as a pair of 8 bit pair registers (H and L). Even the binary opcodes (machine language) were identical, but preceded by a new opcode prefix, as mentioned above. ZiLOG published the opcodes and related mnemonics for the intended functions, but did not document the fact that every opcode that allowed manipulation of the H and L registers was equally valid for the 8 bit portions of the IX and IY registers. As an example, the opcode 26h followed by an immediate byte value (LD H,n) will load that value into the H register. Preceding this two-byte instruction with the IX register's opcode prefix DD, would instead result in the most significant 8 bits of the IX register being loaded with that same value. A notable exception to this would be instructions similar to LD H,(IX+d) which make use of both the HL and IX or IY registers in the same instruction; in this case the DD prefix is only applied to the (IX+d) portion of the instruction.

There are several other undocumented instructions as well.

[edit] Instruction execution

As in all microprocessors, each instruction is divided into several steps which are usually termed machine cycles (M-cycles). Z80 needs between one and six M-cycles to execute a particular instruction as each M-cycle corresponds roughly to one memory access and/or internal operation. Many instructions actually end during the M1 of the next instruction which is known as a fetch/execute overlap.

Examples of typical instructions (R=read, W=write)

 Total
M-cycles   instruction           M1        M2         M3         M4         M5           M6

  1         INC BC             opcode
  2         ADD A,100          opcode     100
  3         ADD HL,DE          opcode   internal   internal
  4         SET 5,(HL)         prefix    opcode   R(HL), set   W(HL)
  5         LD (IX+102),103    prefix    opcode      102      103,add    W(IX+102)
  6         INC (IY+104)       prefix    opcode      104        add    R(IY+104),inc   W(IY+104)

The Z80 machine cycles are sequenced by an internal state machine which builds each M-cycle out of 3,4,5 or 6 discrete steps (i.e. clock cycles) depending on context. This avoids cumbersome asynchronous logic and makes the control signals behave consistently at a wide range of clock frequencies. Naturally, it also means that a higher frequency crystal must be used than without this subdivision of machine cycles (approximately 2-3 times higher). It does not imply tighter requirements on memory access times however, as a high resolution clock allows more precise control of memory timings and memory therefore can be active in parallel with the CPU to a greater extent (i.e. sitting less idle), allowing more efficient use of available memory performance. For instruction execution, the Z80 combines two full clock cycles into a long memory access period (the M1-signal) which would typically last only a fraction of a (longer) clock cycle in a more asynchronous design (such as the 6800, or similar).

Memory, especially EPROM, but also Flash, were generally slow as compared to the state machine sub-cycles (clock cycles) used in contemporary microprocessors. The shortest machine cycle that could safely be used in embedded designs has therefore often been limited by memory access times, not by the maximum CPU frequency (especially so during the home computer era). However, this relation has slowly changed during the last decades, particularly regarding SRAM; cacheless single cycle designs such as the eZ80 have therefore become much more meaningful recently.

[edit] Compatible peripherals

Zilog introduced a number of peripheral parts for the Z80, which all supported the Z80's interrupt handling system and I/O address space. These included the CTC (Counter-Timer-Circuit), the SIO (Serial Input Output), the DMA (Direct Memory Access), the PIO (Parallel Input-Output) and the DART (Dual Asynchronous Receiver Transmitter). As the product line developed, low-power, high-speed and CMOS versions of these chips were produced.

In the same manner as the x86 family, but unlike contemporary 8-bit processors, like the Motorola 6800 and Mos Technology 6502, the Z80 and 8080 had a separate control line and address space for I/O instructions. While some Z80-based computers used "Motorola-style" memory mapped input/output devices, usually the I/O space was used to address one of the many Zilog peripheral chips compatible with the Z80. Zilog I/O chips supported the Z80's new mode 2 interrupts (see description above) which simplified interrupt handling for large numbers of peripherals.

[edit] 'Undocumented' 16 bit I/O-addressing

The Z80 was officially described as supporting 16 bit (64 KB) memory addressing, and 8 bit (256 ports) I/O-addressing. Looking carefully at the hardware reference manual, it can be seen that all I/O instructions actually assert the entire 16-bit address bus. OUT (C),reg and IN reg,(C) places the contents of the entire 16 bit BC register on the address bus; OUT (n),A and IN A,(n) places the contents of the A register on b8-b15 of the address bus and n on b0-b7 of the address bus. A designer could choose to decode the entire 16 bit address bus on I/O operations in order to take advantage of this feature, or use the high half of the address bus to select subfeatures of the I/O device. This feature has also been used to minimise decoding hardware requirements, such as in the Amstrad CPC and ZX81.

[edit] Second sources, derivatives etc.

[edit] Second sources

NEC's μPD780C Z80 clone on a Sinclair ZX Spectrum board.
Sharp's LH0080A Z80 clone
The T34BM1, a Russian Z80 clone.
The Toshiba TMPZ84C015 - a plain Z80 with many peripheral- and other functions on chip.
Hitachi HD64180

Mostek MK3880 and SGS-Thomson Z8400 (now ST Microelectronics) were both second-sources for the Z80. Sharp and NEC developed clones in NMOS, the LH-0080 and µPD780C respectively. Toshiba made a CMOS-version, the TMPZ84C00, which is believed (but not verified) to be the same design also used by Zilog for its own CMOS Z84C00. There were also Z80-chips marked GoldStar and LG.

In East Germany, an unlicensed clone of the Z80, known as the U880, was manufactured. It was very popular and was used in Robotron's and VEB Mikroelektronik Mühlhausen's computer systems (e.g. the KC85-series) and also in many self-made computer systems (ex. COMP JU+TER). In Romania another unlicensed clone could be found, named MMN80CPU and produced by Microelectronica, used in home computers like TIM-S, HC, COBRA.

Also, several fully compatible clones of Z80 were created in the Soviet Union, notable ones being the T34BM1, also called КP1858ВМ1. The first marking was used in pre-production series, while the second had to be used for a larger production. Though, due to the collapse of Soviet microelectronics in late 80s, there are much more T34BM1's than КP1858ВМ1's. These CPUs are not full 'clones' of the Z80, they have different behaviour in some situations. They are said to be made for Soviet ZX Spectrum clones, due to their correct work in these computers. Another Soviet CPU, the КP580ИK80 (later marked as КP580ВМ80), was a clone of the Z80's predecessor, the Intel 8080.

[edit] Derivatives

Fully compatible with the original Z80:

  • Hitachi developed the HD64180, a microcoded and partially dynamic Z80 in CMOS, with on chip peripherals and a simple MMU giving a one MB address space. It was later second sourced by ZiLOG, initially as the Z64180, and then in the form of the slightly modified Z180 which has bus protocol and timings better adapted to Z80 peripheral chips. Z180 has been maintained and further developed under ZiLOG's name, the newest versions being based on the fully static S180/L180 core with very low power draw and EMI (noise).
  • Toshiba developed the 84 pin Z84013 / Z84C13 and the 100 pin Z84015 / Z84C15 series of "intelligent peripheral controllers", basically ordinary NMOS and CMOS Z80 cores with large numbers of Z80 peripherals, watch dog timer, power on reset, and wait state generator on chip. These products are today second sourced by ZiLOG.
  • The 32-bit Z80 compatible ZiLOG Z380, introduced 1994, has survived but never gained real momentum; it is used mainly in telecom equipment.
  • Kawasaki developed the binary compatible KL5C8400 which is appoximately 1.2 to 1.3 times as clock cycle efficient as the original Z80 and can be clocked at up to 33 MHz.
  • ZiLOG's fully pipelined Z80 compatible eZ80 with an 8/16/24-bit word length and a linear 16 MB address space was introduced in 2001. It exists in versions with on chip SRAM and/or flash memory, as well as with integrated peripherals. One variant has on chip MAC (media access controller), and available software include a TCP/IP stack. Contrasting to Z800 and Z280, there are only a few added instructions (primarily LEAs, PEAs, and variable-address 16/24-bit loads), but instructions are instead executed between two and 11 times as clock cycle efficient as on the original Z80. It can be clocked at up to 50 MHz.
  • The Kawasaki KL5C80A12 family is binary compatible with the Z80 and has peripherals as well as a small RAM on chip. It is appoximately as clock cycle efficient as the eZ80 and can be clocked at up to 10 MHz.
  • The Chinese Actions Semiconductor's audio processor family of chips (ATJ2085 and others) contains a Z80-compatible MCU together with a 24-bit dedicated DSP processor. These chips are used in a large number of MP3 and media player products.

Non, or partially, compatible:

  • The Toshiba TLCS-870, TLCS-90 and TLCS-900 series of high volume (mostly OTP) microcontrollers are based on the Z80; they share the same basic BC,DE,HL,IX,IY register structure, and largely the same instructions, but are not binary compatible.
  • Rabbit Semiconductor's Rabbit 2000/3000/4000 microprocessors/microcontrollers are based on the HD64180/Z180 architecture and are partially binary compatible.

No longer produced:

  • The ASCII Corporation R800 was a fast 16-bit processor used in certain MSX computers; it was software, but not hardware compatible with the Z80.
  • Zilog's ill-fated NMOS Z800 and CMOS Z280 were quite fast Z80-implementations (before the HD64180 / Z180) with a 16 MB paged MMU address space; they added many orthogonalizations and addressing modes to the Z80 instruction set, but were too complex and mini-computer inspired to be a natural choice for most embedded applications.[8] In contrast, the plain CMOS Z80 has remained popular, alongside the compatible Z180 and eZ80 families.

[edit] FPGA and ASIC versions

A commercial, functionally equivalent, CPU core is the Evatronix CZ80CPU, available as synthesizable VHDL or Verilog source code, for high volume ASICs, or as post-synthesis EDIF netlists, for low volume FPGAs from Actel, Altera, Lattice or Xilinx.

Free versions are the T80 and TV80, available as VHDL and Verilog sources under a BSD style license. The VHDL version, once synthesized, can be clocked up to 35 MHz on a Xilinx Spartan II FPGA. For large production series, it's much cheaper to use a traditional solution (or ASIC) than an FPGA, however.

[edit] Software emulation

Software emulation of the Z80 instruction set on modern PCs runs faster than the original Z80 CPU ran and is used for home computer simulators (such as Amstrad CPC, MSX and Sinclair ZX Spectrum) and also for video game emulators such as MAME, which executes 1980s vintage video games. SIMH emulates MITS Altair 8800 computer with Intel 8080, Zilog Z80 or Intel 8086 processors.

[edit] Notable uses

[edit] In desktop computers

During the late 1970s and early 1980s, the Z80 was used in a great number of fairly anonymous business-oriented machines with the CP/M operating system; a CPU/OS combination that dominated the market in much the same way that Windows based Intel-machines do today. Two well-known examples of Z80+CP/M business computers are the portable Osborne 1 and the Kaypro series. Research Machines manufactured the 380Z and 480Z microcomputers which were networked with a thin Ethernet type LAN and CP/NET in 1981. Other manufacturers of such systems included Televideo, Xerox and a number of more obscure firms. Some systems used multi-tasking operating system software to share the one processor between several concurrent users.

Home computers using the Z80 (or equivalent) include the following:

For a comprehensive overview, see the List of home computers using the Z80.

  • Such was the popularity of the Z80 and CP/M that the Commodore 128 featured a Z80 processor alongside its MOS Technology 8502 processor for compatibility. Other 6502 architecture computers on the market at the time, such as the BBC Micro, Apple II and the 6510 based Commodore 64, could make use of the Z80 with an external unit, a plug-in card, or an expansion cartridge. The Microsoft Z-80 SoftCard for the Apple II was a particularly successful add-on card and one of Microsoft's few hardware products of the era.
  • The Z80 was also used in the Norwegian Tiki 100 computers, which were the computers of choice in Norwegian primary schools during the late 1980s.
  • The Acer company, formerly Multitech, introduced the Microprofessor I, in 1981. It was designed as a simple and inexpensive training system for the Z80 microprocessor. Currently, it is still being manufactured and sold by Flite Electronics International Limited in Southampton, England
  • A Z80A Polish clone was also used in the Sinclair ZX Spectrum clones produced by Polish company Elwro.
  • In Romania, several Z80 based computers were manufactured: HC85, HC90, HC91, HC2000 (by the Felix Computers Factory, based in Bucharest), CIP-02, CIP-03 and CIP-04 (by the Electronica Factory, located in Bucharest) and TimS, microTIM and TimS+ (designed by several professors from Timişoara Technical University).

[edit] In embedded systems and consumer electronics

Z80 based PABX. The Z80 is to the right of the chip which has a label stuck on.

The Zilog Z80 has long been a popular microprocessor in embedded systems and microcontroller cores, where it remains in widespread use today. The following list provides examples of such applications of the Z80, including uses in consumer electronics products.

Industrial/professional:

Consumer electronics:

Musical instruments, etc.:

[edit] See also

[edit] Articles about the Z80 microprocessor

[edit] Articles about Z80 architecture

  • El-Hajj A, Kabalan KY, Mneimneh M, Karablieh F (August 2000). "Microprocessor simulation and program assembling using spreadsheets". Simulation 75 (2): 82–90. doi:10.1119/1.14604. 
  • Nagasawa K, Taki K, Tamemoto H, Lee BY, Tanaka H, Imai S, Kajikawa Y, Azuma D (April 1997). "Design and evaluation for super low power Z80 with pass-transistor logic". Sharp Technical Journal 67: 35–40. 
  • LUNSCHER W (1985). "Semaphore Strategy For Z80". IEEE Micro (IEEE) 5 (3): 4. 
  • SMITH MF, LUFF BE (1984). "Automatic Assembler Source Translation From The Z80 To The Mc6809". IEEE Micro (IEEE) 4 (2): 3–9. 

[edit] Educational uses

  • Mudge TN, Buzzard GD (1983). "Teaching Assembly Language Programming With ZIP, A Z80 Assembly Language Interpreter Program". IEEE Transactions on Education (IEEE) 26 (3): 91–98. 
  • Microprofessor I Z80 System hardware, associated coursework & training manuals.

[edit] Scientific Applications

[edit] Footnotes

  1. ^ Margins are great, and most chips actually work well at significantly higher (such as 2x) clock frequencies than specified; memory speed has often been the real (physical) limiting factor up until the last 15 years or so, when cheaper and faster available memory chips changed this relation.
  2. ^ Made possible by fully static gate structures.
  3. ^ According to one of the designers, Masatoshi Shima, the market focus was on high performance printers, high-end cash registers, and intelligent terminals.
  4. ^ While R is an 8 bit register, it wraps around at 128 instead of 256. If the programmer stores a value in the register, its high bit will be preserved regardless of what the CPU does to the remaining 7 bits. Incorrect implementation of this behaviour is a common source of problems when running games on emulated Z80-machines
  5. ^ Surprisingly, only quite superficial similarities (such as the word MOV, or the letter X, for extended register) exists between the 8080 and 8086 assembly languages, despite the fact that 8080 programs can be compiled into x86 code (using a special assembler).
  6. ^ The 10-year-newer microcoded Z180 design could initially afford more "chip area", permitting a slightly more efficient implementation (using a wider ALU, among other things), similar things can be said for the Z800, Z280, and Z380. However, it was not until the fully pipelined eZ80 was launched in 2001 that those instructions finally became approximately as cycle-efficient as it is technically possible to make them, i.e. given the Z80 encodings combined with the capability to do an 8-bit read or write every clock cycle.
  7. ^ A retroactive "home computer" comparison: The Z80 takes 11 clocks for a 16-bit addition; the popular 6502 needs around 20 cycles (see for instance [1]) to do the same thing using 8-bit additions and necessary intermediate storage. Using "typical" clocks of 4MHz versus 1MHz respectively (i.e. similarly fast memory chips), this translates into the Z80 being approximately seven times as fast as the 6502 for this particular operation (20/(11/4) ≈ 7).
  8. ^ Minicomputer features such as, user and system modes, multiprocessor support, on chip MMU, on chip instruction and data cache, etc. was seen rather as more complexity than as functionality and support for the (usually electronics-oriented) embedded systems designer, it also made it very hard to predict instruction execution times.

[edit] References

  • Zilog Components Data Book, Zilog, Campbell California, 1985, no ISBN

[edit] External links

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